1 Commits
Author SHA1 Message Date
Hanzo AI 80dba8cb8b fhe: wire batch NTT/INTT to lattice/v7/gpu with byte-equality safety gate
Adds NTTEngine.NTTBatch / INTTBatch that dispatch to luxfi/lattice/v7/gpu
(Metal on darwin, CUDA on linux/NVIDIA) when:

  1. CGo is on and a GPU device is reachable (lattice/gpu.GPUAvailable())
  2. The engine's (N, Q) has passed a deterministic byte-equality probe
     against the CPU subring NTT oracle (cached per (N, Q))

Otherwise falls back to per-polynomial CPU subring NTT. The probe ensures
a GPU context with different convention encoding (Montgomery vs standard,
bit-reversed vs natural) is rejected before it can corrupt ciphertexts.

No `gpu` build tag. CGo is the only compile-time gate.

Tests: ntt_gpu_test.go::TestNTTBatch_ByteEqualToInPlace (probe enforces
byte equality), TestINTTBatch_RoundTrip (INTT(NTT(x)) == x).
2026-05-24 14:17:44 -07:00